The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 2011
Filed:
Jul. 08, 2009
Mamoru Furuta, Kochi, JP;
Takashi Hirao, Kochi, JP;
Hiroshi Furuta, Kochi, JP;
Tokiyoshi Matsuda, Kochi, JP;
Takahiro Hiramatsu, Kochi, JP;
Hiromitsu Ishii, Hamura, JP;
Hitoshi Hokari, Hamura, JP;
Motohiko Yoshida, Hamura, JP;
Mamoru Furuta, Kochi, JP;
Takashi Hirao, Kochi, JP;
Hiroshi Furuta, Kochi, JP;
Tokiyoshi Matsuda, Kochi, JP;
Takahiro Hiramatsu, Kochi, JP;
Hiromitsu Ishii, Hamura, JP;
Hitoshi Hokari, Hamura, JP;
Motohiko Yoshida, Hamura, JP;
Kochi Industrial Promotion Center, Kochi-Shi, JP;
Casio Computer Co., Ltd., Tokyo, JP;
Abstract
A manufacturing method of a thin film transistor includes forming a pair of source/drain electrodes on a substrate, such that the source/drain electrodes define a gap therebetween; forming low resistance conductive thin films, which define a gap therebetween, on the source/drain electrodes; and forming an oxide semiconductor thin film layer on upper surface of the low resistance conductive thin films and in the gap defined between the low resistance conductive thin films so that the oxide semiconductor thin film layer functions as a channel. The low resistance conductive thin films and the oxide semiconductor thin film layer are etched so that side surfaces of the resistance conductive thin films and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of the channel. A gate electrode is mounted over the oxide semiconductor thin film layer.