The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2011
Filed:
Jul. 14, 2008
Yong Siang Tan, Singapore, SG;
Chung Woh Lai, Singapore, SG;
Jin-ping Han, Fishkill, NY (US);
Henry K. Utomo, Newburgh, NY (US);
Judson R. Holt, Wappingers Falls, NY (US);
Eric Harley, Lagrangeville, NY (US);
Richard O. Henry, Wappingers Falls, NY (US);
Richard J. Murphy, Clinton Corners, NY (US);
Yong Siang Tan, Singapore, SG;
Chung Woh Lai, Singapore, SG;
Jin-Ping Han, Fishkill, NY (US);
Henry K. Utomo, Newburgh, NY (US);
Judson R. Holt, Wappingers Falls, NY (US);
Eric Harley, Lagrangeville, NY (US);
Richard O. Henry, Wappingers Falls, NY (US);
Richard J. Murphy, Clinton Corners, NY (US);
Chartered Semiconductor Manufacturing Ltd., Singapore, SG;
International Business Machines Corporation, Armonk, NY (US);
Infineon Technologies North America Corp., San Jose, CA (US);
Infineon Technologies North America Corp., Neubiberg, DE;
Abstract
A method for fabricating a semiconductor device includes forming an SiGe region. The SiGe region can be an embedded source and drain region, or a compressive SiGe channel layer, or other SiGe regions within a semiconductor device. The SiGe region is exposed to an SC1 solution and excess surface portions of the SiGe region are selectively removed. The SC1 etching process can be part of a rework method in which overgrowth regions of SiGe are selectively removed by exposing the SiGe to and SC1 solution maintained at an elevated temperature. The etching process is carried out for a period of time sufficient to remove excess surface portions of SiGe. The SC1 etching process can be carried out at elevated temperatures ranging from about 25° C. to about 65° C.