The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2011

Filed:

Oct. 04, 2007
Applicants:

Henrik Ewe, Burglengenfeld, DE;

Stefan Landau, Wehrheim, DE;

Klaus Schiess, Allensbach, DE;

Robert Bergmann, Regensburg, DE;

Alvin Wee Beng Tatt, Malacca, MY;

Soon Lock Goh, Malacca, MY;

Joachim Mahler, Regensburg, DE;

Boris Plikat, Tegernheim, DE;

Reimund Engl, Regensburg, DE;

Inventors:

Henrik Ewe, Burglengenfeld, DE;

Stefan Landau, Wehrheim, DE;

Klaus Schiess, Allensbach, DE;

Robert Bergmann, Regensburg, DE;

Alvin Wee Beng Tatt, Malacca, MY;

Soon Lock Goh, Malacca, MY;

Joachim Mahler, Regensburg, DE;

Boris Plikat, Tegernheim, DE;

Reimund Engl, Regensburg, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for producing a power semiconductor module having surface mountable flat external contact areas is disclosed. At least one power semiconductor chip is fixed by its rear side on a drain external contact. An insulation layer covers the top side over the side edges of the semiconductor chip as far as the inner housing plane was a leaving free the source and gate contact areas on the top side of the semiconductor chip and also was partly leaving free the top sides of the corresponding external contacts.


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