The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 2011
Filed:
Jul. 25, 2008
Ra-min Tain, Taipei County, TW;
Shu-ming Chang, Taipei County, TW;
Shyi-ching Liau, Hsinchu County, TW;
Wei-chung Lo, Taipei County, TW;
Rong-shen Lee, Hsinchu County, TW;
Chi-shih Chang, Austin, TX (US);
Ra-Min Tain, Taipei County, TW;
Shu-Ming Chang, Taipei County, TW;
Shyi-Ching Liau, Hsinchu County, TW;
Wei-Chung Lo, Taipei County, TW;
Rong-Shen Lee, Hsinchu County, TW;
Chi-Shih Chang, Austin, TX (US);
Industrial Technology Research Institute, Hsinchu, TW;
Abstract
A wafer-to-wafer stacking having a hermetic structure formed therein is provided. The wafer stacking includes a first wafer, including a first substrate and a first device layer having thereon at least one chip and at least one low-k material layer, a second wafer disposed above the first wafer and having a second substrate, and a closed structure disposed on the at least one chip and arranged inside a cutting edge of the at least one chip, wherein the closed structure is extended from one side of the first device layer far from the first substrate to the other side thereof adjacent to the first substrate.