The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 2010

Filed:

Jan. 23, 2007
Applicants:

Yong-tian Hou, Hsin-Chu, TW;

Peng-fu Hsu, Hsin-Chu, TW;

Jin Ying, Singapore, SG;

Kang-cheng Lin, Yonghe, TW;

Kuo-tai Huang, Hsin-Chu, TW;

Tze-liang Lee, Hsin-Chu, TW;

Inventors:

Yong-Tian Hou, Hsin-Chu, TW;

Peng-Fu Hsu, Hsin-Chu, TW;

Jin Ying, Singapore, SG;

Kang-Cheng Lin, Yonghe, TW;

Kuo-Tai Huang, Hsin-Chu, TW;

Tze-Liang Lee, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a first MOS device of a first conductivity type and a second MOS device of a second conductivity type opposite the first conductivity type. The first MOS device includes a first gate dielectric on a semiconductor substrate; a first metal-containing gate electrode layer over the first gate dielectric; and a silicide layer over the first metal-containing gate electrode layer. The second MOS device includes a second gate dielectric on the semiconductor substrate; a second metal-containing gate electrode layer over the second gate dielectric; and a contact etch stop layer having a portion over the second metal-containing gate electrode layer, wherein a region between the portion of the contact etch stop layer and the second metal-containing gate electrode layer is substantially free from silicon.


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