The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2010
Filed:
Jun. 12, 2006
Hironobu Miyamoto, Tokyo, JP;
Yuji Ando, Tokyo, JP;
Yasuhiro Okamoto, Tokyo, JP;
Tatsuo Nakayama, Tokyo, JP;
Takashi Inoue, Tokyo, JP;
Kazuki Ota, Tokyo, JP;
Akio Wakejima, Tokyo, JP;
Kensuke Kasahara, Tokyo, JP;
Yasuhiro Murase, Tokyo, JP;
Kohji Matsunaga, Tokyo, JP;
Katsumi Yamanoguchi, Tokyo, JP;
Hidenori Shimawaki, Tokyo, JP;
Hironobu Miyamoto, Tokyo, JP;
Yuji Ando, Tokyo, JP;
Yasuhiro Okamoto, Tokyo, JP;
Tatsuo Nakayama, Tokyo, JP;
Takashi Inoue, Tokyo, JP;
Kazuki Ota, Tokyo, JP;
Akio Wakejima, Tokyo, JP;
Kensuke Kasahara, Tokyo, JP;
Yasuhiro Murase, Tokyo, JP;
Kohji Matsunaga, Tokyo, JP;
Katsumi Yamanoguchi, Tokyo, JP;
Hidenori Shimawaki, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A field effect transistor includes a layer structure made of compound semiconductor () provided on a semiconductor substrate () made of GaAs or InP, as an operation layer, and employs a first field plate electrode () and a second field plate electrode (). The second field plate electrode includes a shielding part () located in the region between the first field plate electrode and a drain electrode (), and serves to shield the first field plate electrode from the drain electrode. When, in the cross sectional view in the gate length direction, the length in the gate length direction of an overlap region, in which the second field plate electrode overlaps the upper part of a structure composed of the first field plate electrode and a gate electrode (), is designated as Lol, and the gate length is Lg, the relation expressed as 0≦Lol/Lg≦1 holds.