The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 2010

Filed:

Dec. 14, 2007
Applicants:

Hiroaki Ikeda, Tokyo, JP;

Masakazu Ishino, Tokyo, JP;

Hiroyuki Tenmei, Tokyo, JP;

Naoya Kanda, Tokyo, JP;

Yasuhiro Naka, Tokyo, JP;

Kunihiko Nishi, Tokyo, JP;

Inventors:

Hiroaki Ikeda, Tokyo, JP;

Masakazu Ishino, Tokyo, JP;

Hiroyuki Tenmei, Tokyo, JP;

Naoya Kanda, Tokyo, JP;

Yasuhiro Naka, Tokyo, JP;

Kunihiko Nishi, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing a semiconductor device includes the steps of forming first and second semiconductor wafers each including an array of chips and elongate electrodes, forming a groove on scribe lines separating the chips from one another; coating a surface of one of the semiconductor wafers with adhesive; bonding together the semiconductor wafers while allowing the groove to receive therein excessive adhesive; and heating the wafers to connect the elongate electrodes of both the semiconductor wafers.


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