The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 2009
Filed:
Mar. 24, 2006
Shih-wei Sun, Taipei, TW;
Shih-fang Tzou, Hsinchu Hsien, TW;
Jiunn-hsiung Liao, Shanhua Township, Tainan County, TW;
Pei-yu Chou, Shulin, TW;
Shih-Wei Sun, Taipei, TW;
Shih-Fang Tzou, Hsinchu Hsien, TW;
Jiunn-Hsiung Liao, Shanhua Township, Tainan County, TW;
Pei-Yu Chou, Shulin, TW;
United Microelectronics Corp., Hsinchu, TW;
Abstract
A CMOS device is provided, comprising a substrate, a first-type MOS transistor, a second-type MOS transistor, a first stress layer, a first liner layer, and a second stress layer. The substrate has a first active area and a second active area, which are separated by an isolation structure. Further, the first-type MOS transistor is disposed on the first active area of the substrate, and the second-type MOS transistor is disposed on the second active area of the substrate. The first stress layer is compliantly disposed on the first-type MOS transistor of the first active area. The first liner layer is compliantly disposed on the first stress layer. The second stress layer is compliantly disposed on the second-type MOS transistor of the second active area.