The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 2009
Filed:
Mar. 21, 2007
Hui-ling Huang, Tai-Chung, TW;
Ming-shing Chen, Kaohsiung County, TW;
Nien-chung LI, Hsin-Chu, TW;
Li-shiun Chen, Hsinchu, TW;
Hsin Tai, Taipei, TW;
Hui-Ling Huang, Tai-Chung, TW;
Ming-Shing Chen, Kaohsiung County, TW;
Nien-Chung Li, Hsin-Chu, TW;
Li-Shiun Chen, Hsinchu, TW;
Hsin Tai, Taipei, TW;
United Microelectronics Corp., Hsin-Chu, TW;
Abstract
A method for manufacturing MOS transistor with hybrid hard mask includes providing a substrate having a dielectric layer and a polysilicon layer thereon, forming a hybrid hard mask having a middle hard mask and a spacer hard mask covering sidewalls of the middle hard mask on the polysilicon layer, performing a first etching process to etch the polysilicon layer and the dielectric layer through the hybrid hard mask to form a gate structure, performing a second etching process to form recesses in the substrate at two sides of the gate structure, and performing a SEG process to form epitaxial silicon layers in each recess.