The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2009

Filed:

Jun. 14, 2007
Applicants:

Hsin-yi Ho, Hsinchu, TW;

Nian-kai Zous, Taoyuan, TW;

I-jen Huang, Kaohsiung, TW;

Yung-feng Lin, Taoyuan, TW;

Inventors:

Hsin-Yi Ho, Hsinchu, TW;

Nian-Kai Zous, Taoyuan, TW;

I-Jen Huang, Kaohsiung, TW;

Yung-Feng Lin, Taoyuan, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for programming a MLC memory is provided. The MLC memory has a number of bits, and each bit has a number of programmed states. Each programmed state has a first PV level. The method includes (a) programming the bits of the memory having a Vt level lower than the PV level of a targeted programmed state into programmed bits by using a Vd bias BL; (b) ending this method if each bit of the memory has a Vt level not lower than the PV level of the targeted programmed state, otherwise, continuing the step (c); and (c) setting BL=BL+Kand repeating the step (a) if each of the programmed bits has a Vt level lower than the PV level, while setting BL=BL−K, and repeating the step (a) if at least one of the programmed bits has a Vt level not lower than the PV level.


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