The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2009
Filed:
Apr. 25, 2006
Setho Sing Fee, Singapore, SG;
Lim Thiam Chye, Singapore, SG;
Steven W. Heppler, Boise, ID (US);
Leng Nam Yin, Singapore, SG;
Keith Tan, Singapore, SG;
Patrick Guay, Singapore, SG;
Edmund Lua Koon Tian, Singapore, SG;
Yap Kah Eng, Singapore, SG;
Eric Tan Swee Seng, Singapore, SG;
Setho Sing Fee, Singapore, SG;
Lim Thiam Chye, Singapore, SG;
Steven W. Heppler, Boise, ID (US);
Leng Nam Yin, Singapore, SG;
Keith Tan, Singapore, SG;
Patrick Guay, Singapore, SG;
Edmund Lua Koon Tian, Singapore, SG;
Yap Kah Eng, Singapore, SG;
Eric Tan Swee Seng, Singapore, SG;
Micron Technology, Inc., Boise, ID (US);
Abstract
A method for assembling one or more semiconductor devices with an interposer includes positioning the one or more semiconductor devices within a receptacle that extends through the interposer, on a retention element that extends over at least a portion of the receptacle. Material may be introduced between at least a portion of an outer periphery of the one or more semiconductor devices and an inner periphery of the interposer to facilitate securing of the one or more semiconductor devices in place relative to the interposer. The retention element may be removed from the semiconductor devices. Once the one or more semiconductor devices are in place, they may be electrically connected to the interposer.