The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2009

Filed:

Jan. 10, 2006
Applicants:

Vladimir Levinski, Nazareth Ilit, IL;

Michael E. Adel, Zichron Ya'akov, IL;

Aviv Frommer, Misgav, IL;

Daniel Kandel, Aseret, IL;

Inventors:

Vladimir Levinski, Nazareth Ilit, IL;

Michael E. Adel, Zichron Ya'akov, IL;

Aviv Frommer, Misgav, IL;

Daniel Kandel, Aseret, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and apparatus for fabricating a semiconductor die including several target structures. A first layer is formed that includes one or more line or trench structures that extend in a first direction. A second layer is formed that includes one or more line or trench structures that extend in a second direction that is perpendicular to the first structure, such that a projection of the target structure along the first direction is independent of the second direction and a projection of the target structure along the second direction is independent of the first direction. A target structure and a method for generating a calibration curve are also described.


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Levinski, Vladimir. (2009). Methods and apparatus for designing and using micro-targets in overlay metrology (U.S. Patent No. 7526749). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7526749

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