The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2009

Filed:

Mar. 08, 2006
Applicants:

Nobuyuki Kurashima, Yokohama, JP;

Gaku Minamihaba, Kawasaki, JP;

Dai Fukushima, Sagamihara, JP;

Yoshikuni Tateyama, Oita, JP;

Hiroyuki Yano, Yokohama, JP;

Inventors:

Nobuyuki Kurashima, Yokohama, JP;

Gaku Minamihaba, Kawasaki, JP;

Dai Fukushima, Sagamihara, JP;

Yoshikuni Tateyama, Oita, JP;

Hiroyuki Yano, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

A manufacturing method of a semiconductor device comprises: providing a first insulating film whose relative dielectric constant is at most a predetermined value above a substrate; providing a second insulating film whose relative dielectric constant is greater than the predetermined value on a surface of the first insulating film; forming a recess for a wire through the second insulating film and extending into the first insulating film, and also forming a recess for a dummy wire through the second insulating film and extending into the first insulating film spaced from a formed area of the recess for the wire; providing a conductive material inside the recess for the wire and the recess for the dummy wire; and providing a wire inside the recess for the wire and providing a dummy wire inside the recess for the dummy wire by polishing and removing the conductive material.


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