The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 27, 2009
Filed:
Sep. 19, 2006
George D. Papasouliotis, North Andover, MA (US);
Raihan M. Tarafdar, San Jose, CA (US);
Ron Rulkins, Milpitas, CA (US);
Dennis M. Hausmann, Lake Oswego, OR (US);
Jeff Tobin, Mountain View, CA (US);
Adrianne K. Tipton, Pleasanton, CA (US);
Bunsen Nie, Fremont, CA (US);
Wai-fan Yau, Los Altos, CA (US);
Brian G. LU, Fremont, CA (US);
Timothy M. Archer, Lake Oswego, OR (US);
Sasson Roger Somekh, Los Altos Hills, CA (US);
George D. Papasouliotis, North Andover, MA (US);
Raihan M. Tarafdar, San Jose, CA (US);
Ron Rulkins, Milpitas, CA (US);
Dennis M. Hausmann, Lake Oswego, OR (US);
Jeff Tobin, Mountain View, CA (US);
Adrianne K. Tipton, Pleasanton, CA (US);
Bunsen Nie, Fremont, CA (US);
Wai-Fan Yau, Los Altos, CA (US);
Brian G. Lu, Fremont, CA (US);
Timothy M. Archer, Lake Oswego, OR (US);
Sasson Roger Somekh, Los Altos Hills, CA (US);
Novellus Systems, Inc., San Jose, CA (US);
Abstract
Conformal nanolaminate dielectric deposition and etch back processes that can fill high aspect ratio (typically at least 5:1, for example 6:1), narrow width (typically sub 0.13 micron, for example 0.1 micron or less) gaps with significantly reduced incidence of voids or weak spots involve the use of any suitable confirmal dielectric deposition technique and a dry etch back. The etch back part of the process involves a single step or an integrated multi-step (for example, two-step) procedure including an anisotropic dry etch followed by an isotropic dry etch. The all dry deposition and etch back process in a single tool increases throughput and reduces handling of wafers resulting in more efficient and higher quality nanolaminate dielectric gap fill operations.