The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 24, 2008
Filed:
Sep. 21, 2005
Peter J. Geiss, Underhill, VT (US);
Marwan H. Khater, Poughkeepsie, NY (US);
Qizhi Liu, Essex Junction, VT (US);
Randy W. Mann, Poughquag, NY (US);
Robert J. Purtell, Mohegan Lake, NY (US);
Bethann Rainey, South Burlington, VT (US);
Jae-sung Rieh, Fishkill, NY (US);
Andreas D. Stricker, Essex Junction, VT (US);
Peter J. Geiss, Underhill, VT (US);
Marwan H. Khater, Poughkeepsie, NY (US);
Qizhi Liu, Essex Junction, VT (US);
Randy W. Mann, Poughquag, NY (US);
Robert J. Purtell, Mohegan Lake, NY (US);
BethAnn Rainey, South Burlington, VT (US);
Jae-Sung Rieh, Fishkill, NY (US);
Andreas D. Stricker, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Methods for fabricating a heterojunction bipolar transistor having a raised extrinsic base is provided in which the base resistance is reduced by forming a silicide atop the raised extrinsic base that extends to the emitter region in a self-aligned manner. The silicide formation is incorporated into a BiCMOS process flow after the raised extrinsic base has been formed. The present invention also provides a heterojunction bipolar transistor having a raised extrinsic base and a silicide located atop the raised extrinsic base. The silicide atop the raised extrinsic base extends to the emitter in a self-aligned manner. The emitter is separated from the silicide by a spacer.