The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 2008
Filed:
Nov. 19, 2004
Tsung-hua Wu, Kaohsiung Hsien, TW;
Min-lung Huang, Kaohsiung, TW;
Shih-chang Lee, Kaohsiung, TW;
Jen-kuang Fang, Pingtung Hsien, TW;
Yung-i Yeh, Kaohsiung, TW;
Tsung-Hua Wu, Kaohsiung Hsien, TW;
Min-Lung Huang, Kaohsiung, TW;
Shih-Chang Lee, Kaohsiung, TW;
Jen-Kuang Fang, Pingtung Hsien, TW;
Yung-I Yeh, Kaohsiung, TW;
Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;
Abstract
The present invention provides a method of forming a plurality of bumps over a wafer. The wafer has a plurality of contact pads and a passivation layer thereon and the passivation layer exposes the contact pads. An adhesion layer is formed over the active surface of the wafer and covers both the contact pads and the passivation layer. A metallic layer is formed over the adhesion layer. The patterned adhesion layer and patterned metallic layer remain on top of the contact pads. A photoresist layer having a plurality of openings that expose the metallic layer is formed on the active surface of the wafer. A flux material is deposited into the openings and then a solder block is disposed into each of the openings. A reflow process is performed to bond the solder block with the metallic layer. Finally, the flux material and the photoresist layer are removed.