The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2008

Filed:

Jan. 19, 2006
Applicants:

Zong-liang Huo, Suwon-si, KR;

Seung-jae Baik, Seoul, KR;

In-seok Yeo, Seoul, KR;

Hong-sik Yoon, Seongnam-si, KR;

Shi-eun Kim, Seoul, KR;

Inventors:

Zong-Liang Huo, Suwon-si, KR;

Seung-Jae Baik, Seoul, KR;

In-Seok Yeo, Seoul, KR;

Hong-Sik Yoon, Seongnam-si, KR;

Shi-Eun Kim, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods of fabricating a single transistor floating body dynamic random access memory (DRAM) cell include forming a barrier layer on a semiconductor substrate. A body layer is formed on the barrier layer. An isolation layer is formed defining a floating body region within the body layer. A recess region is formed in the floating body region. A gate electrode is formed in the recess region. Impurity ions of a first conductivity type are implanted into a portion of the floating body region on a first side of the recess region to define a source region and into a portion of the floating body on an opposite side of the recess region to define a drain region to provide a floating body.


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