The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2008

Filed:

Aug. 08, 2005
Applicants:

Kartik Ramaswamy, San Jose, CA (US);

Hiroji Hanawa, Sunnyvale, CA (US);

Biagio Gallo, Los Gatos, CA (US);

Kenneth S. Collins, San Jose, CA (US);

Kai MA, Mountain View, CA (US);

Vijay Parihar, Fremont, CA (US);

Dean Jennings, Beverly, MA (US);

Abhilash J. Mayur, Salinas, CA (US);

Amir Al-bayati, San Jose, CA (US);

Andrew Nguyen, San Jose, CA (US);

Inventors:

Kartik Ramaswamy, San Jose, CA (US);

Hiroji Hanawa, Sunnyvale, CA (US);

Biagio Gallo, Los Gatos, CA (US);

Kenneth S. Collins, San Jose, CA (US);

Kai Ma, Mountain View, CA (US);

Vijay Parihar, Fremont, CA (US);

Dean Jennings, Beverly, MA (US);

Abhilash J. Mayur, Salinas, CA (US);

Amir Al-Bayati, San Jose, CA (US);

Andrew Nguyen, San Jose, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming a conductor in a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls, depositing a metal barrier layer comprising the barrier metal on the first barrier layer, depositing a main conductor species seed layer on the metal barrier layer and depositing a main conductor layer. The method further includes annealing the main conductor layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light. The method of Claimfurther comprising, prior to the annealing step, depositing an amorphous carbon optical absorber layer on the main conductor layer. The step of depositing an amorphous carbon optical absorber layer includes introducing a carbon-containing process gas into a reactor chamber containing the substrate in a process zone of the reactor, applying RF source power to an external reentrant conduit of the reactor to generate a reentrant toroidal RF plasma current passing through the process zone and applying a bias voltage to the substrate.

Published as:
US2007032095A1; WO2007019500A1; TW200715415A; US7335611B2;

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