The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 2008
Filed:
Mar. 21, 2005
Chul Lee, Seoul, KR;
Min-sang Kim, Seoul, KR;
Dong-gun Park, Gyeonggi-do, KR;
Choong-ho Lee, Gyeonggi-do, KR;
Chang-woo OH, Gyeonggi-do, KR;
Jae-man Yoon, Seoul, KR;
Dong-won Kim, Gyeonggi-do, KR;
Jeong-dong Choe, Gyeonggi-do, KR;
Ming LI, Gyeonggi-do, KR;
Hye-jin Cho, Gyeonggi-do, KR;
Chul Lee, Seoul, KR;
Min-Sang Kim, Seoul, KR;
Dong-gun Park, Gyeonggi-do, KR;
Choong-ho Lee, Gyeonggi-do, KR;
Chang-woo Oh, Gyeonggi-do, KR;
Jae-man Yoon, Seoul, KR;
Dong-won Kim, Gyeonggi-do, KR;
Jeong-dong Choe, Gyeonggi-do, KR;
Ming Li, Gyeonggi-do, KR;
Hye-jin Cho, Gyeonggi-do, KR;
Abstract
A fin field effect transistor (FinFET) includes a substrate, a fin, a gate electrode, a gate insulation layer, and source and drain regions in the fin. The fin is on and extends laterally along and vertically away from the substrate. The gate electrode covers sides and a top of a portion of the fin. The gate insulation layer is between the gate electrode and the fin. The source region and the drain region in the fin and adjacent to opposite sides of the gate electrode. The source region of the fin has a different width than the drain region of the fin.