The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2007

Filed:

Oct. 20, 2005
Applicants:

Li-shian Jeng, Taitung, TW;

Tung-hsing Lee, Taitung, TW;

Tzyy-ming Cheng, Hsinchu, TW;

Tzermin Shen, Hsinchu, TW;

Da-ching Cho, Chiayi, TW;

Inventors:

Li-Shian Jeng, Taitung, TW;

Tung-Hsing Lee, Taitung, TW;

Tzyy-Ming Cheng, Hsinchu, TW;

Tzermin Shen, Hsinchu, TW;

Da-Ching Cho, Chiayi, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating a gate dielectric layer is described. First, a well is produced in a substrate. Later, the substrate is cleaned. Then the substrate is processed by a pre-annealed process. Afterwards, a gate dielectric layer is formed on the substrate. As a result, the on-current of the semiconductor device can be increased.


Find Patent Forward Citations

Jeng, Li-Shian. (2007). Method of fabricating gate dielectric layer and method of fabricating semiconductor device (U.S. Patent No. 7294541). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7294541

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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