The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2007
Filed:
Feb. 17, 2005
Robert P. Meagley, Hilsboro, OR (US);
Michael J. Leeson, Portland, OR (US);
Michael D. Goodner, Hillsboro, OR (US);
Bob E. Leet, Scottsdale, AZ (US);
Michael L. Mcswiney, Hillsboro, OR (US);
Shan C. Clark, Forest Grove, OR (US);
Robert P. Meagley, Hilsboro, OR (US);
Michael J. Leeson, Portland, OR (US);
Michael D. Goodner, Hillsboro, OR (US);
Bob E. Leet, Scottsdale, AZ (US);
Michael L. McSwiney, Hillsboro, OR (US);
Shan C. Clark, Forest Grove, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Multiple-layer films in integrated circuit processing may be formed by the phase segregation of a single composition formed above a semiconductor substrate. The composition is then induced to phase segregate into at least a first continuous phase and a second continuous phase. The composition may be formed of two or more components that phase segregate into different continuous layers. The composition may also be a single component that breaks down upon activation into two or more components that phase segregate into different continuous layers. Phase segregation may be used to form, for example, a sacrificial light absorbing material (SLAM) and a developer resistant skin, a dielectric layer and a hard mask, a photoresist and an anti-reflective coating (ARC), a stress buffer coating and a protective layer on a substrate package, and light interference layers.