The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2007

Filed:

Mar. 26, 2002
Applicants:

Lawrence D. Wong, Beaverton, OR (US);

Jihperng Leu, Portland, OR (US);

Grant Kloster, Hillsboro, OR (US);

Andrew Ott, Hillsboro, OR (US);

Patrick Morrow, Portland, OR (US);

Inventors:

Lawrence D. Wong, Beaverton, OR (US);

Jihperng Leu, Portland, OR (US);

Grant Kloster, Hillsboro, OR (US);

Andrew Ott, Hillsboro, OR (US);

Patrick Morrow, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/82 (2006.01); H01L 21/76 (2006.01); H01L 21/265 (2006.01); H01L 21/44 (2006.01); H01L 29/80 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus are provided an interconnect cladding layer. In one embodiment, a first sacrificial layer is deposited over a substrate and patterned. In the vias created during the patterning operation, a conductive material is placed to create conductive interconnects. After planarizing the conductive material, the sacrificial layer is removed leaving the interconnect exposed. A cladding layer is then deposited over the conductive material.


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