The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2007

Filed:

Oct. 26, 2005
Applicants:

Timothy Antesberger, Binghamton, NY (US);

James W. Fuller, Jr., Endicott, NY (US);

John J. Konrad, Endicott, NY (US);

John Kresge, Binghamton, NY (US);

Stephen Krasniak, Owego, NY (US);

Timothy L. Wells, Apalachin, NY (US);

Inventors:

Timothy Antesberger, Binghamton, NY (US);

James W. Fuller, Jr., Endicott, NY (US);

John J. Konrad, Endicott, NY (US);

John Kresge, Binghamton, NY (US);

Stephen Krasniak, Owego, NY (US);

Timothy L. Wells, Apalachin, NY (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/82 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of making a circuitized substrate in which the substrate's commoning bar, used during the plating of the circuitry on the substrate, is terminated from the various conductors using a laser. In a preferred embodiment, the laser acts through a dielectric layer (soldermask) which is applied over the circuitry, including the commoning bar and connected parts. The laser may also be used to expose selected ones of the circuit's other parts, including various pads used to accommodate a wirebond (from a chip) and also solder balls for eventual placement of the substrate on a larger circuit board.


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