The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2006
Filed:
May. 25, 2004
Robert Hölzl, Postmünster, DE;
Dirk Dantz, Sassenburg, DE;
Andreas Huber, Garching, DE;
Ulrich Lambert, Emmerting, DE;
Reinhold Wahlich, Tittmoning, DE;
Robert Hölzl, Postmünster, DE;
Dirk Dantz, Sassenburg, DE;
Andreas Huber, Garching, DE;
Ulrich Lambert, Emmerting, DE;
Reinhold Wahlich, Tittmoning, DE;
Siltronic AG, Munich, DE;
Abstract
An SOI wafer, includes a substrate made from silicon, an electrically insulating layer with a thermal conductivity of at least 1.6 W/(Km) and a single-crystal silicon layer with a thickness of from 10 nm to 10 μm, a standard deviation of at most 5% from the mean layer thickness and a density of at most 0.5 HF defects/cm. A process is for producing an SOI wafer of this type, in which a substrate wafer made from silicon is joined to a donor wafer via a layer of the electrically insulating material which has previously been applied. The donor wafer bears a donor layer of single-crystal silicon, with a concentration of vacancies of at most 10/cmand of vacancy agglomerates of at most 10/cm. After the wafers have been joined, the thickness of the donor wafer is reduced in such a manner that the single-crystal silicon layer having these properties is formed from the donor layer, this single-crystal silicon layer being joined to the substrate wafer via the layer of electrically insulating material.