The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 2006
Filed:
Jun. 14, 2004
Neil Mclellan, Danville, CA (US);
Geraldine Tsui Yee Lin, Tung Tau Est., HK;
Chun Ho Fan, Sham Tseng, HK;
Mohan Kirloskar, Cupertino, CA (US);
Ed A. Varga, San Leandro, CA (US);
Neil McLellan, Danville, CA (US);
Geraldine Tsui Yee Lin, Tung Tau Est., HK;
Chun Ho Fan, Sham Tseng, HK;
Mohan Kirloskar, Cupertino, CA (US);
Ed A. Varga, San Leandro, CA (US);
ASAT Limited, Hong Kong, HK;
Abstract
A process for fabricating an integrated circuit package includes: selectively etching a leadframe strip to define a die attach pad and at least one row of contact pads; mounting a semiconductor die to one side of the leadframe strip, on the die attach pad; wire bonding the semiconductor die to ones of the contact pads; releasably clamping the leadframe strip in a mold by releasably clamping the contact pads; molding in a molding compound to cover the semiconductor die, the wire bonds and a portion of the contact pads not covered by the clamping; releasing the leadframe strip from the mold; depositing a plurality of external contacts on the one side of the leadframe strip, on the contact pads, such that the external contacts protrude from the molding compound; and singulating to provide the integrated circuit package.