The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 2006
Filed:
Jan. 16, 2002
Duc Chau, San Jose, CA (US);
Becky Losee, Cedar Hills, UT (US);
Bruce Marchant, Murray, UT (US);
Dean Probst, West Jordan, UT (US);
Robert Herrick, Lehi, UT (US);
James Murphy, South Jordan, UT (US);
Duc Chau, San Jose, CA (US);
Becky Losee, Cedar Hills, UT (US);
Bruce Marchant, Murray, UT (US);
Dean Probst, West Jordan, UT (US);
Robert Herrick, Lehi, UT (US);
James Murphy, South Jordan, UT (US);
Fairchild Semiconductor Corporation, South Portland, ME (US);
Abstract
Self-aligned trench MOSFETs and methods for manufacturing the same are disclosed. By having a self-aligned structure, the number of MOSFETS per unit area—the cell density—is increased, making the MOSFETs cheaper to produce. The self-aligned structure for the MOSFET is provided by making the sidewall of the overlying isolation dielectric layer substantially aligned with the sidewall of the gate conductor. Such an alignment can be made through any number of methods such as using a dual dielectric process, using a selective dielectric oxidation process, using a selective dielectric deposition process, or a spin-on-glass dielectric process.