The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2006

Filed:

Sep. 25, 2003
Applicants:

Kevin J. Yang, Santa Clara, CA (US);

Farid Nemati, Menlo Park, CA (US);

Scott Robins, San Jose, CA (US);

James D. Plummer, Portola Valley, CA (US);

Hyun-jin Cho, Palo Alto, CA (US);

Inventors:

Kevin J. Yang, Santa Clara, CA (US);

Farid Nemati, Menlo Park, CA (US);

Scott Robins, San Jose, CA (US);

James D. Plummer, Portola Valley, CA (US);

Hyun-Jin Cho, Palo Alto, CA (US);

Assignee:

T-Ram Semiconductor, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/72 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for the thyristor to affect leakage characteristics. The density of the carbon and/or a bombardment energy and/or an anneal therefore may be selected to establish a low-voltage, leakage characteristic for the junction substantially greater than its leakage absent the carbon. In one embodiment, an anneal of the implanted carbon may be performed in common with an activation for other implant regions the semiconductor device.


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