The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2006

Filed:

Apr. 28, 2004
Applicants:

Matthew Angyal, Stormville, NY (US);

Edward Paul Barth, Ridgefield, CT (US);

Sanjit Kumar Das, Poughkeepsie, NY (US);

Charles Robert Davis, Fishkill, NY (US);

Habib Hichri, Wappingers Falls, NY (US);

William Francis Landers, Wappingers Falls, NY (US);

Jia Lee, Ossining, NY (US);

Inventors:

Matthew Angyal, Stormville, NY (US);

Edward Paul Barth, Ridgefield, CT (US);

Sanjit Kumar Das, Poughkeepsie, NY (US);

Charles Robert Davis, Fishkill, NY (US);

Habib Hichri, Wappingers Falls, NY (US);

William Francis Landers, Wappingers Falls, NY (US);

Jia Lee, Ossining, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01);
U.S. Cl.
CPC ...
Abstract

An interlevel dielectric layer (ILD) comprises a low-k dielectric layer; and a low-k dielectric film, deposited under compressive stress, atop the dielectric layer. The dielectric layer comprises a low-k material, such as an organosilicon glass (OSG) or a SiCOH material. The dielectric film has a thickness, which is 2%–10% of the thickness of the dielectric layer, has a similar chemical composition to the dielectric layer, but has a different morphology than the dielectric layer. The dielectric film is deposited under compressive stress, in situ, at or near the end of the dielectric layer deposition by altering a process that was used to deposit the low-k dielectric layer.


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