The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2006

Filed:

Oct. 24, 2002
Applicants:

Terence Lawrence Kane, Wappingers Falls, NY (US);

Chung-ping Eng, Hopewell Junction, NY (US);

Brett H. Engel, Wappingers Falls, NY (US);

Barry Jack Ginsberg, Poughkeepsie, NY (US);

Dermott A. Macpherson, Pleasant Valley, NY (US);

John Charles Petrus, Lagrangeville, NY (US);

Inventors:

Terence Lawrence Kane, Wappingers Falls, NY (US);

Chung-Ping Eng, Hopewell Junction, NY (US);

Brett H. Engel, Wappingers Falls, NY (US);

Barry Jack Ginsberg, Poughkeepsie, NY (US);

Dermott A. Macpherson, Pleasant Valley, NY (US);

John Charles Petrus, Lagrangeville, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods of etching a semiconductor structure using ion milling with a variable-position endpoint detector to unlayer multiple interconnect layers, including low-k dielectric films. The ion milling process is controlled for each material type to maintain a planar surface with minimal damage to the exposed materials. In so doing, an ion beam mills a first layer and detects an endpoint thereof using an optical detector positioned within the ion beam adjacent the first layer to expose a second layer of low-k dielectric film. Once the low-k dielectric film is exposed, a portion of the low-k dielectric film may be removed to provide spaces therein, which are backfilled with a material and polished to remove the backfill material and a layer of the multiple interconnect metal layers. Still further, the exposed low-k dielectric film may then be removed, and the exposed metal vias polished.


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