The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2005

Filed:

Jul. 19, 2002
Applicants:

Pei-haw Tsao, Taichung, TW;

Chender Huang, Hsin-Chu, TW;

Jones Wang, Taipei, TW;

Ken Chen, Hsinchu, TW;

Hank Huang, Jungli, TW;

Inventors:

Pei-Haw Tsao, Taichung, TW;

Chender Huang, Hsin-Chu, TW;

Jones Wang, Taipei, TW;

Ken Chen, Hsinchu, TW;

Hank Huang, Jungli, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L021/441 ;
U.S. Cl.
CPC ...
Abstract

A new method is provided for the interconnection of flip chips to a supporting substrate. The invention starts with a conventional first substrate, that serves as a semiconductor device support structure, over the surface of which a first pattern of contacts points has been provided. The invention then uses a second substrate, for instance a glass or quartz plate, and creates over the surface thereof a second pattern of solder bumps separated by solder non-wettable surfaces. The second pattern is a mirror image of the first pattern. By then overlying the first pattern of contact points with the second pattern of solder bumps, a step of reflow can be applied to the solder bumps, transferring the solder bumps from the second substrate to the contact points provided over the first substrate.


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