The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 2004
Filed:
Dec. 12, 2002
Timothy J. Dalton, Ridgefield, CT (US);
Sanjit K. Das, Poughkeepsie, NY (US);
Brett H. Engel, Hopewell Junction, NY (US);
Brian W. Herbst, Poughquag, NY (US);
Habib Hichri, Wappingers Falls, NY (US);
Bernd E. Kastenmeier, Austin, TX (US);
Kelly Malone, Poughkeepsie, NY (US);
Jeffrey R. Marino, Fishkill, NY (US);
Arthur Martin, Queens Village, NY (US);
Vincent J. McGahay, Poughkeepsie, NY (US);
Ian D. Melville, Highland, NY (US);
Chandrasekhar Narayan, Hopewell Junction, NY (US);
Kevin S. Petrarca, Newburgh, NY (US);
Richard P. Volant, New Fairfield, CT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An interconnect structure for a semiconductor device includes an organic, low dielectric constant (low-k) dielectric layer formed over a lower metallization level. A via formed is within the low-k dielectric layer, the via connecting a lower metallization line formed in the lower metallization level with an upper metallization line formed in an upper metallization level. The via is surrounded by a structural collar selected from a material having a coefficient of thermal expansion (CTE) so as to protect the via from shearing forces following a thermal expansion of the low-k dielectric layer.