The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2004

Filed:

Jul. 26, 2002
Applicant:
Inventors:

Chih-Ping Chen, Hsinchu, TW;

Shao-Chung Hsu, Hsinchu, TW;

De-Chuan Liu, Hsinchu, TW;

Jung-Kuei Lu, Hsinchu, TW;

Cheng-Yi Lin, Taichung, TW;

Ta-Hung Yang, Hsinchu, TW;

Hsin-Cheng Liu, Hsinchu, TW;

Mao-I Ting, Hsinchu, TW;

Yih-Cheng Shih, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

The current invention provides a method for analyzing process variations that occur during integrated circuit fabrication. Critical dimension data is collected for each layer of the integrated circuit fabrication process for a period of time and a shift indicator that indicates variation in the critical dimension data for each layer of the integrated circuit fabrication process is calculated. A machine drift significance indicator is also calculated for each machine used in each layer of the integrated circuit fabrication process, and a maximum shift of mean value for each layer of the integrated circuit fabrication process is defined. The shift indicator, the maximum shift of mean value and the machine drift significance indicator are used to determine at least one likely cause of variation in critical dimension for each layer of the integrated circuit fabrication process.


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