The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 2004
Filed:
Mar. 18, 2003
Fsien-Fu Meng, Taipei, TW;
Chyei-Jer Hsieh, Tainan, TW;
Yu-Chen Ho, Ban-Chiao, TW;
Hsu-Li Cheng, Hsinchu, TW;
Ing-Ruey Liaw, Hsinchu, TW;
Vanguard International Semiconductor Corporation, Hsinchu, TW;
Abstract
A method of forming a polysilicon spacer with a vertical profile. A dielectric layer and a sacrificial layer are successively deposited to cover the entire surface of a polysilicon layer that covers an insulating structure. Then, CMP is used to remove parts of the sacrificial layer, the dielectric layer and the polysilicon layer to reach a planarized surface. Then, a part of the polysilicon layer outside the insulating structure is removed to make the insulating structures protrude from the top of the polysilicon layer. After removing the sacrificial layer, forming a second oxide layer on the exposed surface of the polysilicon layer and removing the dielectric layer, dry etching is used to remove the polysilicon layer that is not covered by the second oxide layer. The polysilicon layer left under the second oxide layer serves as a polysilicon spacer with a vertical profile.