The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2004

Filed:

Feb. 24, 2003
Applicant:
Inventors:

Tahorng Yang, Hsinchu, TW;

Henry Chung, Taipei, TW;

Cheng-Chen Calvin Hsueh, Taipei, TW;

Ching-Yu Chang, Yilan Hsien, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1336 ; H01L 2/18234 ; H01L 2/18236 ;
U.S. Cl.
CPC ...
H01L 2/1336 ; H01L 2/18234 ; H01L 2/18236 ;
Abstract

A fabrication method for a read only memory provides a substrate having a memory cell region and a periphery circuit region. A memory cell region has a memory cell array and the periphery circuit region has transistors. A precise layer having a plurality of first openings is formed in the memory cell region. The first openings are above the channel region of each memory cell in the memory cell array and the critical dimension of the first openings is identical. A mask layer having second openings and third openings is formed on the substrate. The second openings locate over a pre-coding memory cell region, and the third openings locate over the transistor gates. An ion implantation is performed to code the memory cell in the pre-coding memory cell region and to adjust the threshold voltage of the transistor, using the precise layer and the mask layer as a mask.


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