The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2003

Filed:

Aug. 03, 2001
Applicant:
Inventors:

Chien-Ping Huang, Hsinchu-Hsien, TW;

Tzong-Da Ho, Taichung, TW;

Cheng-Hsu Hsiao, Nantou, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/302 ; H01L 2/334 ;
U.S. Cl.
CPC ...
H01L 2/302 ; H01L 2/334 ;
Abstract

A semiconductor package with stacked chips is proposed, in which a first chip mounted on and electrically connected to a chip carrier is attached with a rigid interposer thereto, while the rigid interposer has a second chip disposed thereon in a manner that the rigid interposer is interposed between the first chip and the second chip. With the use of the rigid interposer, the second chip stacked on the first chip can be positioned in planarly parallel to the chip carrier, allowing bonding wires for electrically connecting the second chip to the chip carrier to be bonded completely. Moreover, the second chip has portions thereof not located right above the first chip to be firmly supported by the rigid interposer, and thus the second chip can be prevented from cracking in the wire bonding process. Furthermore, on the chip carrier there is formed an encapsulant for encapsulating the first chip, the second chip and part of the chip carrier where the first and second chips are electrically connected thereto,


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