The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 2003
Filed:
Jan. 22, 2002
Guy P. Brouillette, Canton Shefford, CA;
David H. Danovitch, Granby, CA;
Peter A. Gruber, Michigan Lake, NY (US);
Michael Liehr, Essex Junction, DE;
Carlos J. Sambucetti, Croton Hudson, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method for direct chip attach of a semiconductor chip to a circuit board by using solder bumps and an underfill layer is disclosed. In the method, a layer of in-situ polymeric mold material is first screen printed on the top surface of the semiconductor chip exposing a multiplicity of bond pads. The in-situ polymeric mold layer is formed with a multiplicity of apertures which are then filled with solder material in a molten solder screening process to form solder bumps. A thin flux-containing underfill material layer is then placed on top of a circuit board over a plurality of conductive pads which are arranged in a mirror image to the bond pads on the semiconductor chip. The semiconductor chip and the circuit board are then pressed together with the underfill layer inbetween and heated to a reflow temperature of higher than the melting temperature of the solder material until electrical communication is established between the bond pads and the conductive pads. In the bonded assembly, the in-situ polymeric mold layer and the underfill material layer forms a composite underfill to replace a conventional underfill material that must be injected between bonded chip and substrate by a capillary action in a time consuming process.