The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 22, 2003
Filed:
Mar. 28, 2001
Applicant:
Inventors:
Yuji Ando, Tokyo, JP;
Hironobu Miyamoto, Tokyo, JP;
Naotaka Iwata, Tokyo, JP;
Koji Matsunaga, Tokyo, JP;
Masaaki Kuzuhara, Tokyo, JP;
Kensuke Kasahara, Tokyo, JP;
Kazuaki Kunihiro, Tokyo, JP;
Yuji Takahashi, Tokyo, JP;
Tatsuo Nakayama, Tokyo, JP;
Nobuyuki Hayama, Tokyo, JP;
Yasuo Ohno, Tokyo, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 3/1072 ; H01L 3/112 ; H01L 3/300 ; H01L 3/1107 ; H01L 3/1109 ;
U.S. Cl.
CPC ...
H01L 3/1072 ; H01L 3/112 ; H01L 3/300 ; H01L 3/1107 ; H01L 3/1109 ;
Abstract
A hetero-junction FET has an intermediate layer including n-type-impurity doped layer between an electron supply layer and an n-type cap layer. The intermediate layer cancels the polarized negative charge generated between the electron supply layer and the n-type cap layer by ionized positive charge, thereby reducing the barrier against the electrons and source/drain resistance.