The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2002

Filed:

Sep. 09, 1994
Applicant:
Inventors:

Kam S. Law, Union City, CA (US);

Robert Robertson, Palo Alto, CA (US);

Pamela Lou, San Francisco, CA (US);

Marc Michael Kollrack, Alameda, CA (US);

Angela Lee, Sunnyvale, CA (US);

Dan Maydan, Los Altos Hills, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B05D 3/06 ; C23C 1/624 ;
U.S. Cl.
CPC ...
B05D 3/06 ; C23C 1/624 ;
Abstract

Amorphous silicon thin films can be deposited onto large area glass substrates at high deposition rates by chemical vapor deposition using pressure of at least 0.8 Torr and temperatures of about 270-350° C. and fairly high gas flow rates of silane in a hydrogen carrier gas. The spacing between the inlet gas manifold and the substrate in the CVD chamber is maintained so as to maximize the deposition rate. Improved transistor characteristics are observed when the substrate is either exposed to a hydrogen plasma for a few seconds prior to high rate deposition of the amorphous silicon, or when a first layer of amorphous silicon is deposited using a slow deposition rate process prior to deposition of the high deposition rate amorphous silicon.


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