The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2002

Filed:

Jul. 26, 2001
Applicant:
Inventors:

Wong-Cheng Shih, Kaohsiung, TW;

Tzyh-Cheang Lee, Hsin-Chu, TW;

Wenchi Ting, Taipei, TW;

Chih-Hsien Lin, Hsin-Chu, TW;

Shyh-Chyi Wong, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/120 ;
U.S. Cl.
CPC ...
H01L 2/120 ;
Abstract

A method for fabricating an increased capacitance metal-insulator-metal capacitor using an integrated copper damascene process is described. A contact node is provided overlying a semiconductor substrate. An intermetal dielectric layer is deposited overlying the contact node. A damascene opening is formed through the intermetal dielectric layer to the contact node. A first metal layer is formed on the bottom and sidewalls of the damascene opening and overlying the intermetal dielectric layer. A first barrier metal layer is is deposited overlying the first metal layer. A dielectric layer is dpeosited overlying the first barrier metal layer. A second barrier metal layer is deposited overlying the dielectric layer. A second metal layer is formed overlying the second barrier metal layer and completely filling the damascene opening. The layers are polished back to leave the first metal layer, the dielectric layer, the first and second barrier metal layers, and the second metal layer only within the damascene opening wherein the first metal layer forms a bottom electrode, the dielectric layer forms a capacitor dielectric, and the second metal layer forms a top electrode to complete fabrication of a crown-type capacitor in the fabrication of an integrated circuit device.


Find Patent Forward Citations

Loading…