The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2001

Filed:

May. 09, 2000
Applicant:
Inventors:

Je Wang, Hsin-chu, TW;

Han-Chung Chen, Hsin-chu, TW;

Chiarn-Lung Lee, Hsin-chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/131 ; H01L 2/1469 ;
U.S. Cl.
CPC ...
H01L 2/131 ; H01L 2/1469 ;
Abstract

A method for forming BPSG layers over PECVD silicon oxide layers by atmospheric chemical vapor deposition using ozone and TEOS is described. The method prevents the formation of voids in deep depressions such as are found between metallization lines or closely spaced polysilicon structures in flash memory integrated circuits. The method deposits the BPSG layer at ozone/TEOS flow rate ratio of 12:1 or greater. The voids are caused by excessive shrinkage of the BPSG which produces high stresses in the depressions during planarization reflow causing the BPSG to become detached from the underlying silicon oxide. The voids are measured as line defects in a double polysilicon flash memory circuit. The high ozone/TEOS ratio increases the density of the as-deposited BPSG layer which in turn produces reduced shrinkage of the layer during the subsequent planarization reflow. A correlation is found between BPSG shrinkage and line yield.


Find Patent Forward Citations

Loading…