The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2001

Filed:

Dec. 08, 1998
Applicant:
Inventors:

L. Y. Chen, Hsinchu, TW;

Heinz Shih, Hsinchu, TW;

Wen-Yi Hsieh, Hsinchu, TW;

Tsu-An Lin, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/144 ;
Abstract

A method for forming a gate. A gate oxide layer, a polysilicon layer and a barrier layer are subsequently formed on a substrate, on which an isolation structure is formed. A conductive layer is formed on the barrier layer by sputtering deposition using titanium silicide with a low silicon content as a target. A rapid thermal process (RTP) is performed to remove the polymer nodule formed by sputtering deposition. An anti-reflection layer is formed on the conductive layer. The anti-reflection layer, the conductive layer and the barrier layer are patterned by the etchant composed of chlorine/nitrogen/hexafluoroethane until the polysilicon layer is exposed. Using the anti-reflection layer, the conductive layer and the barrier layer as a mask, the exposed polysilicon layer and the gate oxide layer underlying the exposed polysilicon layer are removed by the etchant composed of chlorine/hydrogen bromide/helium/oxygen until the substrate is exposed and a gate is formed.


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