The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 2001
Filed:
Feb. 20, 1996
Naoji Senba, Tokyo, JP;
Yuzo Shimada, Tokyo, JP;
Kazuaki Utsumi, Tokyo, JP;
Kenichi Tokuno, Tokyo, JP;
Ikushi Morizaki, Tokyo, JP;
Akihiro Dohya, Tokyo, JP;
Manabu Bonkohara, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
In a semiconductor package stack module, an LSI (Large Scale Integrated circuit) is mounted, via fine bumps, on a ceramic carrier substrate or a flexible carrier film on which wiring conductors are formed. After a seal resin has been injected, the chip is thinned by, e.g., grinding. A plurality of such carrier substrates or carrier films are connected to each other by bumps via through holes which are electrically connected to the wiring conductors, thereby completing a tridimensional stack module. The module achieves a miniature, thin, dense, low cost, and reliable structure without resorting to a wire bonding system or a TAB (Tape Automated Bonding) system. In addition, the module has a minimum of wiring length and a desirable electric characteristic.