The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 2001
Filed:
Jan. 19, 1999
Chen-Hua Yu, Hsin-chu, TW;
Syun-Ming Jang, Hsin-chu, TW;
Weng Chang, Taipei, TW;
Yao-Yi Cheng, Taipei, TW;
Taiwan Semiconductor Manufacturing Company, Hsin-Chu, TW;
Abstract
A process for fabricating a copper damascene structure, embedded in two levels of low dielectric constant, composite insulator layers, has been developed. The process features the use of two levels of low dielectric constant, composite insulator layers, each comprised of an overlying fluorinated silicon glass, (FSG), layer, and an underlying, applied hydrogen silsesquioxane, (HSQ), layer, with a thin silicon oxynitride layer located between levels of the low dielectric constant, composite insulator layers. A wide diameter opening, of a subsequent dual damascene opening, is formed via dry etching procedures, performed in the upper level, composite insulator layer, with the dry etching procedure, selectively terminating at the appearance of the silicon oxynitride layer. The narrow diameter opening, of the dual damascene opening, is next formed in the silicon oxynitride layer, and in the lower level, composite insulator layer, via dry etching procedures. A copper structure is then formed in the dual damascene opening, embedded in levels of low dielectric constant, composite insulator layers.