The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 08, 2000

Filed:

Feb. 27, 1998
Applicant:
Inventors:

Martin Franosch, Munich, DE;

Wolfgang Hoenlein, Unterhaching, DE;

Helmut Klose, Poughkeepsie, NY (US);

Gerrit Lange, Munich, DE;

Volker Lehmann, Munich, DE;

Hans Reisinger, Gruenwald, DE;

Herbert Schaefer, Brunn, DE;

Reinhard Stengl, Stadtbergen, DE;

Hermann Wendt, Grasbrunn, DE;

Dietrich Widmann, Unterhaching, DE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438398 ; 438397 ; 361313 ;
Abstract

For manufacturing a capacitor, in particular for a dynamic memory cell arrangement, a trench is etched in a substrate. In the trench, a layer sequence is produced that contains, in alternating fashion, layers of doped silicon and germanium-containing layers. By anisotropic etching, the surface of the semiconductor substrate (12) is exposed in the region of the trench floor. The trenches are filled with a conductive support structure (20). The germanium-containing layers are removed selectively to the layers of doped silicon. The exposed surface of the layers of doped silicon (17) and of the support structure (20) are provided with a capacitor dielectric (22), onto which is applied a counter-electrode (23).


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