The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 1999
Filed:
Mar. 26, 1998
Applicant:
Inventors:
Shu-Jen Chen, Hsinchu, TW;
Jacky Kuo, Taipei, TW;
Jiunn-Hsien Lin, Yung Kang, TW;
Chih-Ching Hsu, Hsinchu, TW;
Assignee:
United Semiconductor Circuit Corp., Hsinchu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438586 ; 438303 ; 438299 ; 438592 ; 438630 ; 438649 ; 438647 ; 438651 ; 438655 ; 438657 ; 438664 ; 438682 ; 438684 ;
Abstract
The method of the present invention includes forming a MOS on a semiconductor substrate. Subsequently, a silicon-rich metal silicide layer is deposited on the MOS and substrate by using chemical vapor deposition to act as a silicon material source. Then, a thermal process is carried out to separate a portion of the silicon out of the metal silicide layer, thereby forming a silicon layer on top of the gate of the MOS, source/drain. The nest step is to remove the metal suicide layer. A self-aligned metal silicide layer is formed on the silicon layer.