Yunlin, Taiwan

Jiunn-Hsien Lin

This inventor holds 2 USPTO granted patents. Top assignees: United Microelectronics Corp., United Semiconductor Circuit Corp.. Active years: 1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jiunn-Hsien Lin. Retrieved from https://idiyas.com/inventor/jiunn-hsien-lin-bddm7zvk

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.4

ph-index = 2

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 1999

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2 patents (USPTO):Explore Patents

Title: Jiunn-Hsien Lin: Innovator in Semiconductor Technology

Introduction

Jiunn-Hsien Lin is a notable inventor based in Yung Kang, Taiwan. He has made significant contributions to the field of semiconductor technology, holding two patents that showcase his innovative approaches to manufacturing processes.

Latest Patents

One of his latest patents is titled "Method to grow self-aligned silicon on a poly-gate, source and drain." This invention involves forming a Metal-Oxide-Semiconductor (MOS) on a semiconductor substrate. The process includes depositing a silicon-rich metal silicide layer on the MOS and substrate using chemical vapor deposition. A thermal process is then applied to separate a portion of silicon from the metal silicide layer, resulting in a silicon layer on top of the gate of the MOS, source, and drain. The final step involves removing the metal silicide layer to form a self-aligned metal silicide layer on the silicon layer.

Another significant patent by Lin is the "Method for simultaneously fabricating salicide and self-aligned barrier." This method begins with sputtering a metal stack consisting of titanium and titanium nitride. A salicide layer is formed by thermally reacting the metal stack with the wafer, followed by chemical etching to remove unreacted portions. The metal stack on silicon reacts to create a titanium disilicide layer, which serves as a mask during chemical etching, protecting the titanium nitride layer from being etched. This innovative approach allows for the simultaneous formation of a diffusion barrier layer within the salicide fabrication process.

Career Highlights

Jiunn-Hsien Lin has worked with prominent companies in the semiconductor industry, including United Semiconductor Circuit Corporation and United Microelectronics Corporation. His experience in these organizations has contributed to his expertise in semiconductor manufacturing and innovation.

Collaborations

Throughout his career, Lin has collaborated with notable colleagues such as Shu-Jen Chen and Chih-Ching Hsu. These partnerships have likely fostered a creative environment that encourages the development of groundbreaking technologies.

Conclusion

Jiunn-Hsien Lin's contributions to semiconductor technology through his patents and career experiences highlight his role as an influential inventor in the field. His innovative methods continue to impact the industry and pave the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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