The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 03, 1999
Filed:
Aug. 27, 1996
Michio Nishimura, Tokorozawa, JP;
Kazuhiko Saitoh, Ami-machi, JP;
Masayuki Yasuda, Kunitachi, JP;
Takashi Hayakawa, Fussa, JP;
Michio Tanaka, Ohme, JP;
Yuji Ezaki, Tsuchiura, JP;
Katsuo Yuhara, Ami, JP;
Minoru Ohtsuka, Fussa, JP;
Toshikazu Kumai, Ohme, JP;
Songsu Cho, Fujishiro-machi, JP;
Toshiyuki Kaeriyama, Yawara-mura, JP;
Keizo Kawakita, Ohme, JP;
Toshihiro Sekiguchi, Hidaka, JP;
Yoshitaka Tadaki, Hannoh, JP;
Jun Murata, Kunitachi, JP;
Hideo Aoki, Hamura, JP;
Akihiko Konno, Ohme, JP;
Kiyomi Katsuyama, Hamura, JP;
Takafumi Tokunaga, Iruma, JP;
Yoshimi Torii, Irving, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A semiconductor device, such as a dynamic RAM, and method of making it. A number of stacked cell capacitors are placed at a prescribed spacing in an alignment direction on top of a p.sup.- -type silicon substrate (1). Each capacitor has a nearly perpendicular cylindrical lower electrode (cylindrical polysilicon layer (96)), a dielectric film (silicon nitride film (77)), and upper electrode (plate electrode (78) made of polysilicon). The spacing in the alignment direction is smaller than the inner diameter of the lower electrode.