The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 1999

Filed:

Aug. 05, 1997
Applicant:
Inventors:

Shiaw-Rong Chen, Chung Ho, CN;

Horng-Bor Lu, Hsinchu, CN;

Jenn-Tarng Lin, Hsinchu, CN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438782 ; 438782 ; 438624 ; 438629 ; 438637 ; 438639 ; 438672 ; 438692 ; 438780 ; 438798 ; 438631 ; 438626 ;
Abstract

A method for treating via sidewalls comprising the steps of providing a substrate having a number of metallic wires already formed; depositing a liner oxide layer; depositing an organic spin-on-glass layer; and depositing a second oxide layer. The second oxide layer is planarized by a chemical-mechanical polishing method. Photolithographic and etching methods, employing oxygen plasma treatment as well as a wet etching removal method are used to form vias above the metallic layers. A hydrogen plasma treatment is performed for the via sidewalls to prevent the occurrence of out-gassing and to obtain superior electrical properties. A titanium/titanium nitride film is deposited, and aluminium or tungsten is deposited into the vias and to form aluminium or tungsten plugs, thus completing the manufacturing process according to this invention. A semiconductor device formned by this method is also described.


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