The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 1998

Filed:

Apr. 22, 1997
Applicant:
Inventors:

Toshiro Maekawa, Sagamihara, JP;

Koji Ono, Fujisawa, JP;

Motoaki Okada, Tokyo, JP;

Tamami Takahashi, Tanashi, JP;

Shiro Mishima, Wappingers Falls, NY (US);

Masako Kodera, Yokohama, JP;

Atsushi Shigeta, Fujisawa, JP;

Riichiro Aoki, Tokyo, JP;

Gisuke Kouno, Oita, JP;

Assignees:

Ebara Corporation, Tokyo, JP;

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B08B / ; B08B / ; B08B / ;
U.S. Cl.
CPC ...
134-6 ; 134-7 ; 134 32 ; 134 33 ; 134902 ;
Abstract

A semiconductor cleaning method includes scrubbing a semiconductor wafer using a cleaning member made primarily of polyurethane and having micropores in a surface contacting the semiconductor wafer. The micropores have an average diameter ranging from 10 to 200 .mu.m. The cleaning member may be made of either polyurethane foam or non-woven fabric composed of fibers bound together by urethane resin. By this scrubbing step, particles that are strongly attached to the surface of a substrate such as the semiconductor wafer can easily be removed. During cleaning of the substrate, surface irregularities and crystalline protrusions on the surface of a substrate such as a semiconductor wafer can be scraped off to adjust the surface roughness of the semiconductor wafer to a desired degree for making the semiconductor wafer surface flat.


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