The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 1994

Filed:

Sep. 02, 1992
Applicant:
Inventors:

Chie Yamanaka, Yokohama, JP;

Toshiaki Ichinose, Yokohama, JP;

Takanori Ninomiya, Hiratsuka, JP;

Hisafumi Iwata, Yokohama, JP;

Yasuo Nakagawa, Chigasaki, JP;

Nobuyuki Akiyama, Yokohama, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01N / ; G01N / ;
U.S. Cl.
CPC ...
430 30 ; 430311 ; 250562 ; 250563 ; 356237 ;
Abstract

A method for producing a thin film multilayer substrate having a base substrate, and, which a plurality of conductor pattern layers superposed thereon through dielectric layers therebetween comprises the steps of: optically detecting the uppermost conductor pattern layer whenever the conductor pattern layer is formed on the base substrate; inspecting an absence and/or presence of a fault of the conductor pattern layer; and repairing a faulty portion in accordance with fault position data detected by the inspecting. According to this method, it is possible to enhance a production yield of relatively large size of thin film multilayer substrates which needs a relatively small amount of production at a high production cost, for mounting LSI chips thereon.


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